CHiMPS: A C-level compilation flow for hybrid CPU-FPGA architectures

  • A. Putnam ,
  • D. Bennett ,
  • E. Dellinger ,
  • J. Mason ,
  • P. Sundararajan ,
  • S. Eggers ,

Field Programmable Logic and Applications, 2008. FPL 2008. International Conference on |

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This paper describes CHiMPS, a C-based accelerator compiler for hybrid CPU-FPGA computing platforms. CHiMPSpsilas goal is to facilitate FPGA programming for high-performance computing developers. It inputs generic ANSIC code and automatically generates VHDL blocks for an FPGA. The accelerator architecture is customized with multiple caches that are tuned to the application. Speedups of 2.8x to 36.9x (geometric mean 6.7x) are achieved on a variety of HPC benchmarks with minimal source code changes.