Background
With the rapid growth of cloud-based services, efficient, flexible access to heterogeneous resources in data centers at large scale is becoming increasingly important. Improved abstracted general access primitives, support for global naming spaces, and efficient routing mechanisms are needed to support these requirements.
However, as mentioned in our paper, state-of-the-art data centers are still employing traditional resource access methods. (https://www.usenix.org/conference/nsdi19/presentation/shu).
Specifically:
a) Resources are connected and accessed in different manners (i.e., PCIe, Ethernet) and require different communication stacks, which increases programming complexity.
b) Resources are organized in a server-centric manner. Each resource uses a dedicated name space that can only be accessed from within a host. The lack of global names for resources renders remote access inefficient.
c) Resource multiplexing is a key consideration for sharing various datacenter resources as a resource pool. Currently, however, stack multiplexing is not well supported. The lack of a general resource multiplexing scheme forces developers to manually tailor a solution for each case.
Direct Universal Access/SiliconNet
Direct Universal Access (DUA ) is designed to be a key component of the next generation data center resource communication architecture, providing a set of generic access primitives (SEND/RECEIVE, WRITE/READ), a global naming space, and routing. It is an overlay architecture in that it can use both currently available implementations interfaces and functions and also support the rapid development of new implementations and functions.
a) DUA provides each resource with a global address at a data-center scale. DUA combines the available resource naming schemes into a new hierarchical naming convention. Because of the hierarchical address design format that is used, both local access and remote access can be efficiently performed.
b) The DUA control plane manages all resources, assigning addresses and calculating the routing paths to reach them, and manages the multiplexing of resources. In addition, a general resource multiplexing scheme is proposed in the DUA design.
Details of the concept and design can be found in the published paper, the blog, and on Twitter.
Paper: (https://www.usenix.org/conference/nsdi19/presentation/shu)
Blog: (https://www.microsoft.com/en-us/research/blog/researchers-seek-to-simplify-the-complex-in-cloud-computing/)
Twitter: (https://x.com/MSFTResearch/status/1105876693091344384)
SiliconNet is a highly configurable, non-blocking hardware switch that provides a sample implementation of the switching component in the DUA overlay. It has been implemented in Verilog/SystemVerilog and released as open source in GitHub with the code name SiliconNet (https://github.com/microsoft/DUA). The current version is a reference design written in Verilog/SystemVerilog.
In this release, the following features are provided:
- Non-blocking hardware switch that supports up to 16 ports, with each port up to 8GB/sec.
- A replaceable shim layer that supports up to four virtual channels to share one port at full bandwidth.
- Variable flit size from (256 bits x 4 cycles) to (512 bits x 8 cycles).
- Variable message size from 32 bytes to 4 kilobytes.
- Round robin packet scheduling.
- Intel (formerly Altera) devices are natively supported. There is nothing within the code that would preclude porting to other devices.
Call for Collaboration
The Networking Research Group at Microsoft Research Asia is developing multiple projects utilizing the SiliconNet reference design. We have shown that multiple data center resources, such as FPGAs, SSDs, and GPUs, work well with this design.
Everyone is welcome to use SiliconNet. The GitHub page provides details on how to build, how to integrate it with other projects, and how to collaborate with the community.
Thank you.
Email: [email protected]